Как называется порядковый номер байта

Подробности

Опубликовано 07.02.2012 18:27

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§6.Компьютерная память

Основные темы параграфа:

внутренняя и внешняя память;

структура внутренней памяти компьютера;

носители и устройства внешней памяти.

Внутренняя и внешняя память

Работая с информацией, человек пользуется не только своими знаниями, но и книгами, справочниками и другими внешними источниками. В главе 1 «Человек и информация» было отмечено, что информация хранится в памяти человека и на внешних носителях. Заученную информацию человек может забыть, а записи сохраняются надежнее.

У компьютера тоже есть два вида памяти: внутренняя (оперативная) и внешняя (долговременная) память.

Внутренняя память — это электронное устройство, ко­торое хранит информацию, пока питается электроэнергией. При отключении компьютера от сети информация из опера­тивной памяти исчезает. Программа во время ее выполнения хранится во внутренней памяти компьютера. Сформулиро­ванное правило относится к принципам Неймана. Его назы­вают принципом хранимой программы.

Внешняя память — это различные магнитные носители (ленты, диски), оптические диски. Сохранение информации на них не требует постоянного электропитания.

На рис. 2,3 показана схема устройства компьютера с уче­том двух видов памяти. Стрелки указывают направления ин­формационного обмена.

Структура внутренней памяти компьютера

Все устройства компьютера производят определенную ра­боту с информацией (данными и программами). А как же представляется в компьютере сама информация? Для ответа на этот вопрос «заглянем» внутрь машинной памяти. Струк­туру внутренней памяти компьютера можно условно изобра­зить так, как показано на рис. 2.4.

В современных компьютерах имеется еще один вид внутренней па­мяти, который называется постоянным запоминающим устройст­вом — ПЗУ. Это энергонезависимая память, информация из кото­рой может только читаться.

Наименьший элемент памяти компьютера называется би­том памяти. На рис. 2.4 каждая клетка изображает бит. Вы видите, что у слова «бит» есть два значения: единица измере­ния количества информации и частица памяти компьютера. Покажем, как связаны между собой эти понятия.

В каждом бите памяти может храниться в данный момент одно из двух значений: нуль или единица. Использование двух знаков для представления информации называется двоичной кодировкой.

Данные и программы в памяти компьютера хранятся в виде двоичного кода.

Один символ двухсимвольного алфавита несет 1 бит ин­формации.

В одном бите памяти содержится один бит информации.

Битовая структура определяет первое свойство внутрен­ней памяти компьютера — дискретность. Дискретные объ­екты составлены из отдельных частиц. Например, песок ди­скретен, так как состоит из песчинок, «Песчинками» ком­пьютерной памяти являются биты.

Второе свойство внутренней памяти компьютера — адресуе­мость. Восемь расположенных подряд битов памяти образуют байт. Вы знаете, что это слово также обозначает единицу коли­чества информации, равную восьми битам. Следовательно» в одном байте памяти хранится один байт информации.

Во внутренней памяти компьютера все байты пропумеро ваны. Нумерация начинается с нуля.

Порядковый номер байта называется его адресом,     

Принцип адресуемости означает, что:

Запись информации в память, а также чтение ее из памяти производится по адресам.

Память можно представить как многоквартирный дом, в котором каждая квартира — это байт, а номер квартиры — адрес. Для того чтобы почта дошла по назначению, необхо­димо указать правильный адрес. Именно так, по адресам, об­ращается процессор к внутренней памяти компьютера.

Носители и устройства внешней памяти

Устройства внешней памяти — это устройства чтения и записи информации на внешние носители. Информация на внешних носителях хранится в виде файлов. Что это такое, подробнее вы узнаете позже.

Важнейшими устройствами внешней памяти на современ­ных компьютерах являются накопители на магнитных ди­сках (НМД), или дисководы.

Кто не знает, что такое магнитофон? На магнитофон мы привыкли записывать речь, музыку, а затем прослушивать записи. Звук записывается на дорожках магнитной ленты с помощью магнитной головки, с помощью этого же устройст­ва магнитная запись снова превращается в звук.

НМД действует аналогично магнитофону. На дорожки диска записывается все тот же двоичный код: намагничен­ный участок — единица, не намагниченный — нуль. При чте­нии с диска эта запись превращается в нули и единицы в би­тах внутренней памяти.

К магнитной поверхности диска подводится записываю­щая головка (рис. 2.5), которая может перемещаться по ра­диусу. Во время работы НМД диск вращается. В каждом фиксированном положении головка взаимодействует с кру­говой дорожкой. На эти концентрические дорожки и произ­водится запись двоичной информации.

Другим видом внешних носителей являются оптические диски (другое их название — лазерные диски), На них ис­пользуется не магнитный, а оптико-механический способ за­писи и чтения информации.

Сначала появились лазерные диски, на которые информа­ция записывается только один раз. Стереть или перезаписать ее невозможно. Такие диски называются CD-ROM — Com­pact Disk-Read Only Memory, что в переводе значит «ком­пактный диск — только для чтения». Позже были изобрете­ны перезаписываемые лазерные диски — CD-RW. На них, как и на магнитных носителях, хранимую информацию можно стирать и записывать заново.

Носители, которые пользователь может извлекать из дис­ковода, называют сменными.

Наибольшей информационной емкостью из сменных но­сителей обладают лазерные диски типа DVD-ROM — видео­диски. Объем информации, хранящейся на них, может до­стигать десятков гигабайтов. На видеодисках записываются полноформатные видеофильмы, которые можно просматри­вать с помощью компьютера, как по телевизору.

Коротко о главном

В состав компьютера входят внутренняя память и внеш­няя память.

Исполняемая программа хранится во внутренней памяти (принцип хранимой программы).

Информация в памяти компьютера имеет двоичную форму.

Наименьшим элементом внутренней памяти компьютера является бит. Один бит памяти хранит один бит информа­ции: значение 0 или 1.

Восемь подряд расположенных битов образуют байт памя­ти. Байты пронумерованы, начиная с нуля. Порядковый но­мер байта называется его адресом.

Во внутренней памяти запись и чтение информации про­исходят по адресам.

Внешняя память: магнитные диски, оптические (лазер­ные) диски — CD-ROM, CD-RW, DVD-ROM.

Вопросы и задания

1.Постарайтесь объяснить, зачем компьютеру нужны два вида па­мяти: внутренняя и внешняя.

2.Что такое «принцип хранимой программы»?

3.В чем заключается свойство дискретности внутренней памяти ЭВМ?

4.Какие два значения имеет слово «бит»? Как они связаны между собой?

5.В чем заключается свойство адресуемости внутренней памяти ЭВМ?

6. Назовите устройства внешней памяти ЭВМ.

7. Какие типы оптических дисков вы знаете?

Страница 8 из 31

Параграф 6 Компьютерная память ©

1. Постарайтесь объяснить, зачем компьютеру нужны два вида памяти: внутренняя и внешняя. Подготовьте сообщение.

Внутренняя память находится внутри компьютера и предназначена для хранения программ и их данных в процессе работы ЭВМ. Внешняя память предназначена для долговременного и энергонезависимого хранения программ и данных (при отключении питания она не обнуляется).

Внешняя память — это различные магнитные носители (ленты, диски), оптические диски, флеш-карты памяти. Хранение информации на внешних носителях не требует постоянного электропитания. 

Внутренняя память подразделяется на оперативную и постоянную.

Оперативная память (RAM, random-access memory) служит для хранения программ и данных, с которыми работает процессор в данный момент. На оперативную память накладываются жесткие ограничения по скорости чтения и записи информации. Современные типы оперативной памяти не могут сохранять свое содержимое после выключения питания компьютера.

Постоянная память (ROM, read-only memory) служит для хранения программ, которые должны быть доступны компьютеру сразу после включения, еще до загрузки операционной системы. В постоянной памяти хранится программа первоначального тестирования, BIOS (базовая система ввода-вывода) компьютера. На отдельных микросхемах ROM, размешенных на платах расширения (видеокартах, сетевых адаптерах), хранятся BIOS этих плат.

2. Что такое принцип хранимой программы?

Исполняемая программа хранится во внутренней памяти компьютера.

3. В чем заключается свойство дискретности внутренней памяти компьютера?

Информация в памяти компьютера имеет двоичную форму. Наименьшим элементом внутренней памяти компьютера  является бит. Один бит памяти хранит один бит информации: значение 0 или 1. Восемь подряд расположенных битов образуют байт памяти.

4. Какие два значения имеет слово «бит»? Как они связаны между собой?

У слова «бит» есть два значения: единица измерения количества информации и частица памяти компьютера.

5. В чем заключается свойство адресуемости внутренней памяти компьютера?

Восемь подряд расположенных битов образуют байт памяти. Байты пронумерованы, начиная с нуля. Порядковый номер байта называется его адресом.

6. Что представляет собой машинная программа? Какая информация содержится в команде программы?

Машинная программа — множество команд, расположенных в последовательных ячейках памяти.
Команда программы состоит из операционной части — кода операции и адресной части — адресов размещения в памяти  обрабатываемых  данных. Код операции определяет действие, выполняемое процессором по команде. Работа процессора заключается в автоматическом выполнении последовательности команд программы до ее завершения (команды остановки).

7. Назовите устройства внешней памяти компьютера и сделайте их фотографии.

Магнитные диски; оптические (лазерные) диски — CD, DVD, BD; флеш-память; твердотельные накопите-ли (SSD-диски).

8. Какие типы оптических дисков вы знаете?

CD-ROM — Compact Disk–Read Only Memory
CD-RW
DVD — Digital Versatile Disk
BD — Blu-ray Disc

9. Для чего нужна кэш-память?

В кэш-памяти дублируются данные и команды из оперативной памяти, к которым процессор наиболее часто обращается при выполнении программы. Поэтому первоначально процессор ищет требуемую информацию в кэш-памяти, и только если ее там не обнаруживает, обращается к более медленной оперативной памяти.

Внутренняя
память ЭВМ обладает двумя основными
свойствами: дискретностью и адресуемостью.

Память
дискретна
— это значит, что память состоит из
некоторых «частиц». «Частица» памяти
называется бит
(так же как единица информации). Итак,
память компьютера — это упорядоченная
последовательность двоичных разрядов
(бит). Эта последовательность делится
на группы по 8 разрядов; каждая такая
группа образует байт памяти. Следовательно,
слова «бит» и «байт» обозначают не
только названия единиц измерения
количества информации, но и структурные
единицы памяти ЭВМ.

Объем
памяти ЭВМ измеряется в килобайтах (1
Кбайт (Кб) = 2¹⁰
байта = 1024 байта), мегабайтах (1 Мбайт
(Мб) = 1024 Кбайт), гигабайтах (1 Гбайт (Гб)
= 1024 Мбайт). Например, оперативная память
компьютеры серии IBM
PC
— от 1 Мб и более.

Ячейка
памяти— это группа последовательных
байтов внутренней памяти, вмещающая в
себя информацию, доступную для обработки
отдельной командой процессора. Содержимое
ячейки памяти называется машинным
словом. Очевидно, разрядность ячейки
памяти и размер машинного слова в битах
равны разрядности процессора. У разных
типов компьютеров размер машинного
слова бывает разным. У самых простых
типов ПК (бытовых, учебных) машинное
слово равно 1 байту (8 бит). Такие машины
называются восьмиразрядными («Агат»,
«Корвет», «Ямаха»). Двухбайтовое машинное
слово (16 бит) у школьного компьютера
УКНЦ, а также у профессиональных ПК IBM
PC/86,
286. У машин типа IBM
PC/386,
486 машинное слово равно 4 байтам (32 бита).

Байты
внутренней памяти пронумерованы.
Нумерация начинается с нуля. Порядковый
номер байта называется адресом байта
(подобно тому как номер квартиры в доме
есть адрес этой квартиры). Принцип
адресуемости памяти означает то, что
любая информация заносится в память и
извлекается из нее по адресам.

Адрес
ячейки памяти равен адресу младшего
байта (байта с наименьшим номером),
входящим в ячейку. Адресация как байтов,
так и ячеек памяти начинается с нуля.
Адреса ячеек кратны количеству байтов
в машинном слове (изменяются через 1,
или через 2, или через 4).

Регистры
— это внутренняя память процессора.
Регистров немного (у IBM
PC
их 14). Каждый из регистров служит своего
рода черновиком, используя который
процессор выполняет расчеты и сохраняет
промежуточные результаты. Полученные
результаты переписываются из регистров
в ячейки ОЗУ.

Обмен
информацией между процессором и
внутренней памятью производится
машинными словами (из регистра в ячейку
и обратно). Адрес ячейки, в которую
направляется информация, передаваемая
по шине данных, передается процессором
по адресной шине.

На
устройствах внешней памяти (магнитных
носителях), которые также называют
внешними запоминающими устройствами
(ВЗУ), информация также представлена в
двоичном коде: состоянием намагниченных
и ненамагниченных участков на дорожках
ленты или диска.

Внутренняя
память состоит из оперативного
запоминающего устройства (ОЗУ),
или оперативной памяти (ОП), и постоянного
запоминающего устройства (ПЗУ).

В
современных ПК есть быстрая память еще
одного вида, имеющая специальное
назначение. Это видеопамять. Видеопамять
хранит код изображения, выводимого на
дисплей. В IBM
PC
видеопамять является компонентой
контроллера (видеоадаптера, видеокарты),
управляющего работой дисплея.

Для
ускорения доступа к данным используется
специальное устройство, называемое
кэш-памятью.
Кэш-память — это «сверхоперативная»
память сравнительно небольшого объема
(обычно до 256 Кбайт), построенная на иной
элементной базе, чем оперативная память.
В кэш-памяти хранятся наиболее часто
используемые участки оперативной
памяти. При обращении процессора к
памяти сначала производится поиск
нужных данных в кэш-памяти. Поскольку
время доступа к кэш-памяти в несколько
раз меньше, чем к оперативной памяти,
то среднее время доступа к памяти
уменьшается.

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In computing, endianness is the order or sequence of bytes of a word of digital data in computer memory. Endianness is primarily expressed as big-endian (BE) or little-endian (LE). A big-endian system stores the most significant byte of a word at the smallest memory address and the least significant byte at the largest.
A little-endian system, in contrast, stores the least-significant byte at the smallest address.^[1][2][3] Bi-endianness is a feature supported by numerous computer architectures that feature switchable endianness in data fetches and stores or for instruction fetches.
Other orderings are generically called middle-endian or mixed-endian.^[4][5][6][7]

Endianness may also be used to describe the order in which the bits are transmitted over a communication channel^{[citation needed]}, e.g., big-endian in a communications channel transmits the most significant bits first.^{[8][citation needed]} Bit-endianness is seldom used in other contexts.

Etymology[edit]

Danny Cohen introduced the terms big-endian and little-endian into computer science for data ordering in an Internet Experiment Note published in 1980.^[9]

The adjective endian has its origin in the writings of 18th century Anglo-Irish writer Jonathan Swift. In the 1726 novel Gulliver’s Travels, he portrays the conflict between sects of Lilliputians divided into those breaking the shell of a boiled egg from the big end or from the little end. Because the emperor’s son had cut his finger while opening an egg from the big end, doing so was prohibited by an imperial edict; those who rebelled and did so were called «Big-Endians» (Swift did not use the term Little-Endians in the work).^[10][11] Cohen makes the connection to Gulliver’s Travels explicit in the appendix to his 1980 note.

Previously the name byte sex was sometimes used for the same concept.^[12][13][14]

Overview[edit]

Computers store information in various-sized groups of binary bits. Each group is assigned a number, called its address, that the computer uses to access that data. On most modern computers, the smallest data group with an address is eight bits long and is called a byte. Larger groups comprise two or more bytes, for example, a 32-bit word contains four bytes. There are two possible ways a computer could number the individual bytes in a larger group, starting at either end. Both types of endianness are in widespread use in digital electronic engineering. The initial choice of endianness of a new design is often arbitrary, but later technology revisions and updates perpetuate the existing endianness to maintain backward compatibility.

Internally, any given computer will work equally well regardless of what endianness it uses since its hardware will consistently use the same endianness to both store and load its data. For this reason, programmers and computer users normally ignore the endianness of the computer they are working with. However, endianness can become an issue when moving data external to the computer – as when transmitting data between different computers, or a programmer investigating internal computer bytes of data from a memory dump – and the endianness used differs from expectation. In these cases, the endianness of the data must be understood and accounted for.

These two diagrams show how two computers using different endianness store a 32-bit (four byte) integer with the value of 0x0A0B0C0D. In both cases, the integer is broken into four bytes, 0x0A, 0x0B, 0x0C, and 0x0D, and the bytes are stored in four sequential byte locations in memory, starting with the memory location with address a, then a + 1, a + 2, and a + 3. The difference between big and little endian is the order of the four bytes of the integer being stored.

The left-side diagram shows a computer using big-endian. This starts the storing of the integer with the most-significant byte, 0x0A, at address a, and ends with the least-significant byte, 0x0D, at address a + 3.

The right-side diagram shows a computer using little-endian. This starts the storing of the integer with the least-significant byte, 0x0D, at address a, and ends with the most-significant byte, 0x0A, at address a + 3.

Since each computer uses its same endianness to both store and retrieve the integer, the results will be the same for both computers. Issues may arise when memory is addressed by bytes instead of integers, or when memory contents are transmitted between computers with different endianness.

Big-endianness is the dominant ordering in networking protocols, such as in the internet protocol suite, where it is referred to as network order, transmitting the most significant byte first. Conversely, little-endianness is the dominant ordering for processor architectures (x86, most ARM implementations, base RISC-V implementations) and their associated memory. File formats can use either ordering; some formats use a mixture of both or contain an indicator of which ordering is used throughout the file.^[15]

The styles of little- and big-endian may also be used more generally to characterize the ordering of any representation, e.g. the digits in a numeral system or the sections of a date. Numbers in positional notation are generally written with their digits in left-to-right big-endian order, even in right-to-left scripts. Similarly, programming languages use big-endian digit ordering for numeric literals.

Basics[edit]

Computer memory consists of a sequence of storage cells (smallest addressable units); in machines that support byte addressing, those units are called bytes. Each byte is identified and accessed in hardware and software by its memory address. If the total number of bytes in memory is n, then addresses are enumerated from 0 to n − 1.

Computer programs often use data structures or fields that may consist of more data than can be stored in one byte. In the context of this article where its type cannot be arbitrarily complicated, a «field» consists of a consecutive sequence of bytes and represents a «simple data value» which – at least potentially – can be manipulated by one single hardware instruction. On most systems, the address of a multi-byte simple data value is the address of its first byte (the byte with the lowest address).^{[note 1]}

Another important attribute of a byte being part of a «field» is its «significance».
These attributes of the parts of a field play an important role in the sequence the bytes are accessed by the computer hardware, more precisely: by the low-level algorithms contributing to the results of a computer instruction.

Numbers[edit]

Positional number systems (mostly base 2, or less often base 10^{[note 2]}) are the predominant way of representing and particularly of manipulating integer data by computers. In pure form this is valid for moderate sized non-negative integers, e.g. of C data type unsigned. In such a number system, the value of a digit which it contributes to the whole number is determined not only by its value as a single digit, but also by the position it holds in the complete number, called its significance. These positions can be mapped to memory mainly in two ways:^[16]

• decreasing numeric significance with increasing memory addresses (or increasing time), known as big-endian and
• increasing numeric significance with increasing memory addresses (or increasing time), known as little-endian.^{[note 3]}

The integer data that are directly supported by the computer hardware have a fixed width of a low power of 2, e.g. 8 bits ≙ 1 byte, 16 bits ≙ 2 bytes, 32 bits ≙ 4 bytes, 64 bits ≙ 8 bytes, 128 bits ≙ 16 bytes. The low-level access sequence to the bytes of such a field depends on the operation to be performed. The least-significant byte is accessed first for addition, subtraction and multiplication. The most-significant byte is accessed first for division and comparison. See § Calculation order.

For floating-point numbers, see § Floating point.

Text[edit]

When character (text) strings are to be compared with one another, e.g. in order to support some mechanism like sorting, this is very frequently done lexicographically where a single positional element (character) also has a positional value. Lexicographical comparison means almost everywhere: first character ranks highest – as in the telephone book.^{[note 4]}

Integer numbers written as text are always represented most significant digit first in memory, which is similar to big-endian, independently of text direction.

Hardware[edit]

Many historical and extant processors use a big-endian memory representation, either exclusively or as a design option. Other processor types use little-endian memory representation; others use yet another scheme called middle-endian, mixed-endian or PDP-11-endian.

Some instruction sets feature a setting which allows for switchable endianness in data fetches and stores, instruction fetches, or both. This feature can improve performance or simplify the logic of networking devices and software. The word bi-endian, when said of hardware, denotes the capability of the machine to compute or pass data in either endian format.

Dealing with data of different endianness is sometimes termed the NUXI problem.^[17] This terminology alludes to the byte order conflicts encountered while adapting UNIX, which ran on the mixed-endian PDP-11,^{[note 5]} to a big-endian IBM Series/1 computer. Unix was one of the first systems to allow the same code to be compiled for platforms with different internal representations. One of the first programs converted was supposed to print out Unix, but on the Series/1 it printed nUxi instead.^[18]

The IBM System/360 uses big-endian byte order, as do its successors System/370, ESA/390, and z/Architecture. The PDP-10 uses big-endian addressing for byte-oriented instructions. The IBM Series/1 minicomputer uses big-endian byte order.

The Datapoint 2200 used simple bit-serial logic with little-endian to facilitate carry propagation. When Intel developed the 8008 microprocessor for Datapoint, they used little-endian for compatibility. However, as Intel was unable to deliver the 8008 in time, Datapoint used a medium-scale integration equivalent, but the little-endianness was retained in most Intel designs, including the MCS-48 and the 8086 and its x86 successors.^[19][20] The DEC Alpha, Atmel AVR, VAX, the MOS Technology 6502 family (including Western Design Center 65802 and 65C816), the Zilog Z80 (including Z180 and eZ80), the Altera Nios II, and many other processors and processor families are also little-endian.

The Motorola 6800 / 6801, the 6809 and the 68000 series of processors used the big-endian format.

The Intel 8051, unlike other Intel processors, expects 16-bit addresses for LJMP and LCALL in big-endian format; however, xCALL instructions store the return address onto the stack in little-endian format.^[21]

SPARC historically used big-endian until version 9, which is bi-endian.

Similarly early IBM POWER processors were big-endian, but the PowerPC and Power ISA descendants are now bi-endian.

The ARM architecture was little-endian before version 3 when it became bi-endian.

Newer architectures[edit]

The IA-32 and x86-64 instruction set architectures use the little-endian format. Other instruction set architectures that follow this convention, allowing only little-endian mode, include Nios II, Andes Technology NDS32, and Qualcomm Hexagon.

Solely big-endian architectures include the IBM z/Architecture and OpenRISC.

Some instruction set architectures are «bi-endian» and allow running software of either endianness; these include Power ISA, SPARC, ARM AArch64, C-Sky, and RISC-V. IBM AIX and IBM i run in big-endian mode on bi-endian Power ISA; Linux originally ran in big-endian mode, but by 2019, IBM had transitioned to little-endian mode for Linux to ease the porting of Linux software from x86 to Power.^[22][23] SPARC has no relevant little-endian deployment, as both Oracle Solaris and Linux run in big-endian mode on bi-endian SPARC systems, and can be considered big-endian in practice. ARM, C-Sky, and RISC-V have no relevant big-endian deployments, and can be considered little-endian in practice.

Bi-endianness[edit]

Some architectures (including ARM versions 3 and above, PowerPC, Alpha, SPARC V9, MIPS, Intel i860, PA-RISC, SuperH SH-4 and IA-64) feature a setting which allows for switchable endianness in data fetches and stores, instruction fetches, or both. This feature can improve performance or simplify the logic of networking devices and software. The word bi-endian, when said of hardware, denotes the capability of the machine to compute or pass data in either endian format.

Many of these architectures can be switched via software to default to a specific endian format (usually done when the computer starts up); however, on some systems, the default endianness is selected by hardware on the motherboard and cannot be changed via software (e.g. the Alpha, which runs only in big-endian mode on the Cray T3E).

Note that the term bi-endian refers primarily to how a processor treats data accesses. Instruction accesses (fetches of instruction words) on a given processor may still assume a fixed endianness, even if data accesses are fully bi-endian, though this is not always the case, such as on Intel’s IA-64-based Itanium CPU, which allows both.

Note, too, that some nominally bi-endian CPUs require motherboard help to fully switch endianness. For instance, the 32-bit desktop-oriented PowerPC processors in little-endian mode act as little-endian from the point of view of the executing programs, but they require the motherboard to perform a 64-bit swap across all 8 byte lanes to ensure that the little-endian view of things will apply to I/O devices. In the absence of this unusual motherboard hardware, device driver software must write to different addresses to undo the incomplete transformation and also must perform a normal byte swap.

Some CPUs, such as many PowerPC processors intended for embedded use and almost all SPARC processors, allow per-page choice of endianness.

SPARC processors since the late 1990s (SPARC v9 compliant processors) allow data endianness to be chosen with each individual instruction that loads from or stores to memory.

The ARM architecture supports two big-endian modes, called BE-8 and BE-32.^[24] CPUs up to ARMv5 only support BE-32 or word-invariant mode. Here any naturally aligned 32-bit access works like in little-endian mode, but access to a byte or 16-bit word is redirected to the corresponding address and unaligned access is not allowed. ARMv6 introduces BE-8 or byte-invariant mode, where access to a single byte works as in little-endian mode, but accessing a 16-bit, 32-bit or (starting with ARMv8) 64-bit word results in a byte swap of the data. This simplifies unaligned memory access as well as memory-mapped access to registers other than 32 bit.

Many processors have instructions to convert a word in a register to the opposite endianness, that is, they swap the order of the bytes in a 16-, 32- or 64-bit word. All the individual bits are not reversed though.

Recent Intel x86 and x86-64 architecture CPUs have a MOVBE instruction (Intel Core since generation 4, after Atom),^[25] which fetches a big-endian format word from memory or writes a word into memory in big-endian format. These processors are otherwise thoroughly little-endian.

There are also devices which use different formats in different places. For instance, the BQ27421 Texas Instruments battery gauge uses the little-endian format for its registers and the big-endian format for its random-access memory. This behavior does not seem to be modifiable.

Floating point[edit]

Although many processors use little-endian storage for all types of data (integer, floating point), there are a number of hardware architectures where floating-point numbers are represented in big-endian form while integers are represented in little-endian form.^[26] There are ARM processors that have mixed-endian floating-point representation for double-precision numbers: each of the two 32-bit words is stored as little-endian, but the most significant word is stored first. VAX floating point stores little-endian 16-bit words in big-endian order. Because there have been many floating-point formats with no network standard representation for them, the XDR standard uses big-endian IEEE 754 as its representation. It may therefore appear strange that the widespread IEEE 754 floating-point standard does not specify endianness.^[27] Theoretically, this means that even standard IEEE floating-point data written by one machine might not be readable by another. However, on modern standard computers (i.e., implementing IEEE 754), one may safely assume that the endianness is the same for floating-point numbers as for integers, making the conversion straightforward regardless of data type. Small embedded systems using special floating-point formats may be another matter, however.

Variable-length data[edit]

Most instructions considered so far contain the size (lengths) of their operands within the operation code. Frequently available operand lengths are 1, 2, 4, 8, or 16 bytes. But there are also architectures where the length of an operand may be held in a separate field of the instruction or with the operand itself, e.g. by means of a word mark. Such an approach allows operand lengths up to 256 bytes or larger. The data types of such operands are character strings or BCD. Machines able to manipulate such data with one instruction (e.g. compare, add) include the IBM 1401, 1410, 1620, System/360, System/370, ESA/390, and z/Architecture, all of them of type big-endian.

Simplified access to part of a field[edit]

On most systems, the address of a multi-byte value is the address of its first byte (the byte with the lowest address); little-endian systems of that type have the property that, for sufficiently low data values, the same value can be read from memory at different lengths without using different addresses (even when alignment restrictions are imposed). For example, a 32-bit memory location with content 4A 00 00 00 can be read at the same address as either 8-bit (value = 4A), 16-bit (004A), 24-bit (00004A), or 32-bit (0000004A), all of which retain the same numeric value. Although this little-endian property is rarely used directly by high-level programmers, it is occasionally employed by code optimizers as well as by assembly language programmers.^{[examples needed]}

In more concrete terms, identities like this are the equivalent of the following C code returning true on most little-endian systems:

union {
  uint8_t u8; uint16_t u16; uint32_t u32; uint64_t u64;
} u = { .u64 = 0x4A };
puts(u.u8 == u.u16 && u.u8 == u.u32 && u.u8 == u.u64 ? "true" : "false");

While not allowed by C++, such type punning code is allowed as «implementation-defined» by the C11 standard^[28] and commonly used^[29] in code interacting with hardware.^[30]

On the other hand, in some situations it may be useful to obtain an approximation of a multi-byte or multi-word value by reading only its most significant portion instead of the complete representation; a big-endian processor may read such an approximation using the same base address that would be used for the full value.

Simplifications of this kind are of course not portable across systems of different endianness.

Calculation order[edit]

Some operations in positional number systems have a natural or preferred order in which the elementary steps are to be executed. This order may affect their performance on small-scale byte-addressable processors and microcontrollers. However, high-performance processors usually fetch multi-byte operands from memory in the same amount of time they would have fetched a single byte, so the complexity of the hardware is not affected by the byte ordering.

Addition, subtraction, and multiplication start at the least significant digit position and propagate the carry to the subsequent more significant position. On most systems, the address of a multi-byte value is the address of its first byte (the byte with the lowest address). The implementation of these operations is marginally simpler using little-endian machines where this first byte contains the least significant digit.

Comparison and division start at the most significant digit and propagate a possible carry to the subsequent less significant digits. For fixed-length numerical values (typically of length 1,2,4,8,16), the implementation of these operations is marginally simpler on big-endian machines.

Some big-endian processors (e.g. the IBM System/360 and its successors) contain hardware instructions for lexicographically comparing varying length character strings.

The normal data transport by an assignment statement is in principle independent of the endianness of the processor.

Middle-endian[edit]

Numerous other orderings, generically called middle-endian or mixed-endian, are possible.

The PDP-11 is in principle a 16-bit little-endian system. The instructions to convert between floating-point and integer values in the optional floating-point processor of the PDP-11/45, PDP-11/70, and in some later processors, stored 32-bit «double precision integer long» values with the 16-bit halves swapped from the expected little-endian order. The UNIX C compiler used the same format for 32-bit long integers. This ordering is known as PDP-endian.^[31]

A way to interpret this endianness is that it stores a 32-bit integer as two little-endian 16-bit words, with a big-endian word ordering:

The 16-bit values here refer to their numerical values, not their actual layout.

Segment descriptors of IA-32 and compatible processors keep a 32-bit base address of the segment stored in little-endian order, but in four nonconsecutive bytes, at relative positions 2, 3, 4 and 7 of the descriptor start.^[32]

Endian dates[edit]

Dates can be represented with different endianness by the ordering of the year, month and day. For example, September 13, 2002 can be represented as:

• little-endian date (day, month, year), 13-09-2002
• middle-endian dates (month, day, year), 09-13-2002
• big-endian date (year, month, day), 2002-09-13 as with ISO 8601

In date and time notation in the United States, dates are middle-endian and differ from date formats worldwide.

Byte addressing[edit]

When memory bytes are printed sequentially from left to right (e.g. in a hex dump), little-endian representation of integers has the significance increasing from left to right. In other words, it appears backwards when visualized, which can be counter-intuitive.

This behavior arises, for example, in FourCC or similar techniques that involve packing characters into an integer, so that it becomes a sequences of specific characters in memory. Let’s define the notation 'John' as simply the result of writing the characters in hexadecimal ASCII and appending 0x to the front, and analogously for shorter sequences (a C multicharacter literal, in Unix/MacOS style):

   '  J  o  h  n  '
hex  4A 6F 68 6E
----------------
   -> 0x4A6F686E

On big-endian machines, the value appears left-to-right, coinciding with the correct string order for reading the result:

But on a little-endian machine, one would see:

Middle-endian machines complicate this even further; for example, on the PDP-11, the 32-bit value is stored as two 16-bit words ‘Jo’ ‘hn’ in big-endian, with the characters in the 16-bit words being stored in little-endian:

Byte swapping[edit]

Byte-swapping consists of rearranging bytes to change endianness. Many compilers provide built-ins that are likely to be compiled into native processor instructions (bswap/movbe), such as __builtin_bswap32. Software interfaces for swapping include:

• Standard network endianness functions (from/to BE, up to 32-bit).^[33] Windows has a 64-bit extension in winsock2.h.
• BSD and Glibc endian.h functions (from/to BE and LE, up to 64-bit).^[34]
• macOS OSByteOrder.h macros (from/to BE and LE, up to 64-bit).

Some CPU instruction sets provide native support for endian byte swapping, such as bswap^[35] (x86 — 486 and later), and rev^[36] (ARMv6 and later).

Some compilers have built-in facilities for byte swapping. For example, the Intel Fortran compiler supports the non-standard CONVERT specifier when opening a file, e.g.: OPEN(unit, CONVERT='BIG_ENDIAN',...). Other compilers have options for generating code that globally enables the conversion for all file IO operations. This permits the reuse of code on a system with the opposite endianness without code modification.

Logic design[edit]

Hardware description languages (HDLs) used to express digital logic often support arbitrary endianness, with arbitrary granularity. For example, in SystemVerilog, a word can be defined as little endian or big endian:

logic [31:0] little_endian; // bit 0 is the least significant bit
logic [0:31] big_endian;    // bit 31 is the least significant bit
logic [0:3][7:0] mixed;     // each byte is little-endian, but bytes are packed in big-endian order.

Files and filesystems[edit]

The recognition of endianness is important when reading a file or filesystem created on a computer with different endianness.

Fortran sequential unformatted files created with one endianness usually cannot be read on a system using the other endianness because Fortran usually implements a record (defined as the data written by a single Fortran statement) as data preceded and succeeded by count fields, which are integers equal to the number of bytes in the data. An attempt to read such a file using Fortran on a system of the other endianness results in a run-time error, because the count fields are incorrect.

Unicode text can optionally start with a byte order mark (BOM) to signal the endianness of the file or stream. Its code point is U+FEFF. In UTF-32 for example, a big-endian file should start with 00 00 FE FF; a little-endian should start with FF FE 00 00.

Application binary data formats, such as MATLAB .mat files, or the .bil data format, used in topography, are usually endianness-independent. This is achieved by storing the data always in one fixed endianness or carrying with the data a switch to indicate the endianness. An example of the former is the binary XLS file format that is portable between Windows and Mac systems and always little-endian, requiring the Mac application to swap the bytes on load and save when running on a big-endian Motorola 68K or PowerPC processor.^[37]

TIFF image files are an example of the second strategy, whose header instructs the application about the endianness of their internal binary integers. If a file starts with the signature MM it means that integers are represented as big-endian, while II means little-endian. Those signatures need a single 16-bit word each, and they are palindromes, so they are endianness independent. I stands for Intel and M stands for Motorola. Intel CPUs are little-endian, while Motorola 680×0 CPUs are big-endian. This explicit signature allows a TIFF reader program to swap bytes if necessary when a given file was generated by a TIFF writer program running on a computer with a different endianness.

As a consequence of its original implementation on the Intel 8080 platform, the operating system-independent File Allocation Table (FAT) file system is defined with little-endian byte ordering, even on platforms using another endianness natively, necessitating byte-swap operations for maintaining the FAT on these platforms.

ZFS, which combines a filesystem and a logical volume manager, is known to provide adaptive endianness and to work with both big-endian and little-endian systems.^[38]

Networking[edit]

Many IETF RFCs use the term network order, meaning the order of transmission for bits and bytes over the wire in network protocols. Among others, the historic RFC 1700 (also known as Internet standard STD 2) has defined the network order for protocols in the Internet protocol suite to be big-endian, hence the use of the term network byte order for big-endian byte order.^[39]

However, not all protocols use big-endian byte order as the network order. The Server Message Block (SMB) protocol uses little-endian byte order. In CANopen, multi-byte parameters are always sent least significant byte first (little-endian). The same is true for Ethernet Powerlink.^[40]

The Berkeley sockets API defines a set of functions to convert 16-bit and 32-bit integers to and from network byte order: the htons (host-to-network-short) and htonl (host-to-network-long) functions convert 16-bit and 32-bit values respectively from machine (host) to network order; the ntohs and ntohl functions convert from network to host order.^[41][42] These functions may be a no-op on a big-endian system.

While the high-level network protocols usually consider the byte (mostly meant as octet) as their atomic unit, the lowest network protocols may deal with ordering of bits within a byte.

Bit endianness[edit]

Bit numbering is a concept similar to endianness, but on a level of bits, not bytes. Bit endianness^{[citation needed]} or bit-level endianness refers to the transmission order of bits over a serial medium. The bit-level analogue of little-endian (least significant bit goes first) is used in RS-232, HDLC, Ethernet, and USB. Some protocols use the opposite ordering (e.g. Teletext, I²C, SMBus, PMBus, and SONET and SDH^[43]), and ARINC 429 uses one ordering for its label field and the other ordering for the remainder of the frame. Usually, there exists a consistent view to the bits irrespective of their order in the byte, such that the latter becomes relevant only on a very low level. One exception is caused by the feature of some cyclic redundancy checks to detect all burst errors up to a known length, which would be spoiled if the bit order is different from the byte order on serial transmission.

Apart from serialization, the terms bit endianness and bit-level endianness are seldom used, as computer architectures where each individual bit has a unique address are rare. Individual bits or bit fields are accessed via their numerical value or, in high-level programming languages, assigned names, the effects of which, however, may be machine dependent or lack software portability.

Notes[edit]

References[edit]

In computing, endianness is the order or sequence of bytes of a word of digital data in computer memory. Endianness is primarily expressed as big-endian (BE) or little-endian (LE). A big-endian system stores the most significant byte of a word at the smallest memory address and the least significant byte at the largest.
A little-endian system, in contrast, stores the least-significant byte at the smallest address.^[1][2][3] Bi-endianness is a feature supported by numerous computer architectures that feature switchable endianness in data fetches and stores or for instruction fetches.
Other orderings are generically called middle-endian or mixed-endian.^[4][5][6][7]

Endianness may also be used to describe the order in which the bits are transmitted over a communication channel^{[citation needed]}, e.g., big-endian in a communications channel transmits the most significant bits first.^{[8][citation needed]} Bit-endianness is seldom used in other contexts.

Etymology[edit]

Danny Cohen introduced the terms big-endian and little-endian into computer science for data ordering in an Internet Experiment Note published in 1980.^[9]

The adjective endian has its origin in the writings of 18th century Anglo-Irish writer Jonathan Swift. In the 1726 novel Gulliver’s Travels, he portrays the conflict between sects of Lilliputians divided into those breaking the shell of a boiled egg from the big end or from the little end. Because the emperor’s son had cut his finger while opening an egg from the big end, doing so was prohibited by an imperial edict; those who rebelled and did so were called «Big-Endians» (Swift did not use the term Little-Endians in the work).^[10][11] Cohen makes the connection to Gulliver’s Travels explicit in the appendix to his 1980 note.

Previously the name byte sex was sometimes used for the same concept.^[12][13][14]

Overview[edit]

Computers store information in various-sized groups of binary bits. Each group is assigned a number, called its address, that the computer uses to access that data. On most modern computers, the smallest data group with an address is eight bits long and is called a byte. Larger groups comprise two or more bytes, for example, a 32-bit word contains four bytes. There are two possible ways a computer could number the individual bytes in a larger group, starting at either end. Both types of endianness are in widespread use in digital electronic engineering. The initial choice of endianness of a new design is often arbitrary, but later technology revisions and updates perpetuate the existing endianness to maintain backward compatibility.

Internally, any given computer will work equally well regardless of what endianness it uses since its hardware will consistently use the same endianness to both store and load its data. For this reason, programmers and computer users normally ignore the endianness of the computer they are working with. However, endianness can become an issue when moving data external to the computer – as when transmitting data between different computers, or a programmer investigating internal computer bytes of data from a memory dump – and the endianness used differs from expectation. In these cases, the endianness of the data must be understood and accounted for.

These two diagrams show how two computers using different endianness store a 32-bit (four byte) integer with the value of 0x0A0B0C0D. In both cases, the integer is broken into four bytes, 0x0A, 0x0B, 0x0C, and 0x0D, and the bytes are stored in four sequential byte locations in memory, starting with the memory location with address a, then a + 1, a + 2, and a + 3. The difference between big and little endian is the order of the four bytes of the integer being stored.

The left-side diagram shows a computer using big-endian. This starts the storing of the integer with the most-significant byte, 0x0A, at address a, and ends with the least-significant byte, 0x0D, at address a + 3.

The right-side diagram shows a computer using little-endian. This starts the storing of the integer with the least-significant byte, 0x0D, at address a, and ends with the most-significant byte, 0x0A, at address a + 3.

Since each computer uses its same endianness to both store and retrieve the integer, the results will be the same for both computers. Issues may arise when memory is addressed by bytes instead of integers, or when memory contents are transmitted between computers with different endianness.

Big-endianness is the dominant ordering in networking protocols, such as in the internet protocol suite, where it is referred to as network order, transmitting the most significant byte first. Conversely, little-endianness is the dominant ordering for processor architectures (x86, most ARM implementations, base RISC-V implementations) and their associated memory. File formats can use either ordering; some formats use a mixture of both or contain an indicator of which ordering is used throughout the file.^[15]

The styles of little- and big-endian may also be used more generally to characterize the ordering of any representation, e.g. the digits in a numeral system or the sections of a date. Numbers in positional notation are generally written with their digits in left-to-right big-endian order, even in right-to-left scripts. Similarly, programming languages use big-endian digit ordering for numeric literals.

Basics[edit]

Computer memory consists of a sequence of storage cells (smallest addressable units); in machines that support byte addressing, those units are called bytes. Each byte is identified and accessed in hardware and software by its memory address. If the total number of bytes in memory is n, then addresses are enumerated from 0 to n − 1.

Computer programs often use data structures or fields that may consist of more data than can be stored in one byte. In the context of this article where its type cannot be arbitrarily complicated, a «field» consists of a consecutive sequence of bytes and represents a «simple data value» which – at least potentially – can be manipulated by one single hardware instruction. On most systems, the address of a multi-byte simple data value is the address of its first byte (the byte with the lowest address).^{[note 1]}

Another important attribute of a byte being part of a «field» is its «significance».
These attributes of the parts of a field play an important role in the sequence the bytes are accessed by the computer hardware, more precisely: by the low-level algorithms contributing to the results of a computer instruction.

Numbers[edit]

Positional number systems (mostly base 2, or less often base 10^{[note 2]}) are the predominant way of representing and particularly of manipulating integer data by computers. In pure form this is valid for moderate sized non-negative integers, e.g. of C data type unsigned. In such a number system, the value of a digit which it contributes to the whole number is determined not only by its value as a single digit, but also by the position it holds in the complete number, called its significance. These positions can be mapped to memory mainly in two ways:^[16]

• decreasing numeric significance with increasing memory addresses (or increasing time), known as big-endian and
• increasing numeric significance with increasing memory addresses (or increasing time), known as little-endian.^{[note 3]}

The integer data that are directly supported by the computer hardware have a fixed width of a low power of 2, e.g. 8 bits ≙ 1 byte, 16 bits ≙ 2 bytes, 32 bits ≙ 4 bytes, 64 bits ≙ 8 bytes, 128 bits ≙ 16 bytes. The low-level access sequence to the bytes of such a field depends on the operation to be performed. The least-significant byte is accessed first for addition, subtraction and multiplication. The most-significant byte is accessed first for division and comparison. See § Calculation order.

For floating-point numbers, see § Floating point.

Text[edit]

When character (text) strings are to be compared with one another, e.g. in order to support some mechanism like sorting, this is very frequently done lexicographically where a single positional element (character) also has a positional value. Lexicographical comparison means almost everywhere: first character ranks highest – as in the telephone book.^{[note 4]}

Integer numbers written as text are always represented most significant digit first in memory, which is similar to big-endian, independently of text direction.

Hardware[edit]

Many historical and extant processors use a big-endian memory representation, either exclusively or as a design option. Other processor types use little-endian memory representation; others use yet another scheme called middle-endian, mixed-endian or PDP-11-endian.

Some instruction sets feature a setting which allows for switchable endianness in data fetches and stores, instruction fetches, or both. This feature can improve performance or simplify the logic of networking devices and software. The word bi-endian, when said of hardware, denotes the capability of the machine to compute or pass data in either endian format.

Dealing with data of different endianness is sometimes termed the NUXI problem.^[17] This terminology alludes to the byte order conflicts encountered while adapting UNIX, which ran on the mixed-endian PDP-11,^{[note 5]} to a big-endian IBM Series/1 computer. Unix was one of the first systems to allow the same code to be compiled for platforms with different internal representations. One of the first programs converted was supposed to print out Unix, but on the Series/1 it printed nUxi instead.^[18]

The IBM System/360 uses big-endian byte order, as do its successors System/370, ESA/390, and z/Architecture. The PDP-10 uses big-endian addressing for byte-oriented instructions. The IBM Series/1 minicomputer uses big-endian byte order.

The Datapoint 2200 used simple bit-serial logic with little-endian to facilitate carry propagation. When Intel developed the 8008 microprocessor for Datapoint, they used little-endian for compatibility. However, as Intel was unable to deliver the 8008 in time, Datapoint used a medium-scale integration equivalent, but the little-endianness was retained in most Intel designs, including the MCS-48 and the 8086 and its x86 successors.^[19][20] The DEC Alpha, Atmel AVR, VAX, the MOS Technology 6502 family (including Western Design Center 65802 and 65C816), the Zilog Z80 (including Z180 and eZ80), the Altera Nios II, and many other processors and processor families are also little-endian.

The Motorola 6800 / 6801, the 6809 and the 68000 series of processors used the big-endian format.

The Intel 8051, unlike other Intel processors, expects 16-bit addresses for LJMP and LCALL in big-endian format; however, xCALL instructions store the return address onto the stack in little-endian format.^[21]

SPARC historically used big-endian until version 9, which is bi-endian.

Similarly early IBM POWER processors were big-endian, but the PowerPC and Power ISA descendants are now bi-endian.

The ARM architecture was little-endian before version 3 when it became bi-endian.

Newer architectures[edit]

The IA-32 and x86-64 instruction set architectures use the little-endian format. Other instruction set architectures that follow this convention, allowing only little-endian mode, include Nios II, Andes Technology NDS32, and Qualcomm Hexagon.

Solely big-endian architectures include the IBM z/Architecture and OpenRISC.

Some instruction set architectures are «bi-endian» and allow running software of either endianness; these include Power ISA, SPARC, ARM AArch64, C-Sky, and RISC-V. IBM AIX and IBM i run in big-endian mode on bi-endian Power ISA; Linux originally ran in big-endian mode, but by 2019, IBM had transitioned to little-endian mode for Linux to ease the porting of Linux software from x86 to Power.^[22][23] SPARC has no relevant little-endian deployment, as both Oracle Solaris and Linux run in big-endian mode on bi-endian SPARC systems, and can be considered big-endian in practice. ARM, C-Sky, and RISC-V have no relevant big-endian deployments, and can be considered little-endian in practice.

Bi-endianness[edit]

Some architectures (including ARM versions 3 and above, PowerPC, Alpha, SPARC V9, MIPS, Intel i860, PA-RISC, SuperH SH-4 and IA-64) feature a setting which allows for switchable endianness in data fetches and stores, instruction fetches, or both. This feature can improve performance or simplify the logic of networking devices and software. The word bi-endian, when said of hardware, denotes the capability of the machine to compute or pass data in either endian format.

Many of these architectures can be switched via software to default to a specific endian format (usually done when the computer starts up); however, on some systems, the default endianness is selected by hardware on the motherboard and cannot be changed via software (e.g. the Alpha, which runs only in big-endian mode on the Cray T3E).

Note that the term bi-endian refers primarily to how a processor treats data accesses. Instruction accesses (fetches of instruction words) on a given processor may still assume a fixed endianness, even if data accesses are fully bi-endian, though this is not always the case, such as on Intel’s IA-64-based Itanium CPU, which allows both.

Note, too, that some nominally bi-endian CPUs require motherboard help to fully switch endianness. For instance, the 32-bit desktop-oriented PowerPC processors in little-endian mode act as little-endian from the point of view of the executing programs, but they require the motherboard to perform a 64-bit swap across all 8 byte lanes to ensure that the little-endian view of things will apply to I/O devices. In the absence of this unusual motherboard hardware, device driver software must write to different addresses to undo the incomplete transformation and also must perform a normal byte swap.

Some CPUs, such as many PowerPC processors intended for embedded use and almost all SPARC processors, allow per-page choice of endianness.

SPARC processors since the late 1990s (SPARC v9 compliant processors) allow data endianness to be chosen with each individual instruction that loads from or stores to memory.

The ARM architecture supports two big-endian modes, called BE-8 and BE-32.^[24] CPUs up to ARMv5 only support BE-32 or word-invariant mode. Here any naturally aligned 32-bit access works like in little-endian mode, but access to a byte or 16-bit word is redirected to the corresponding address and unaligned access is not allowed. ARMv6 introduces BE-8 or byte-invariant mode, where access to a single byte works as in little-endian mode, but accessing a 16-bit, 32-bit or (starting with ARMv8) 64-bit word results in a byte swap of the data. This simplifies unaligned memory access as well as memory-mapped access to registers other than 32 bit.

Many processors have instructions to convert a word in a register to the opposite endianness, that is, they swap the order of the bytes in a 16-, 32- or 64-bit word. All the individual bits are not reversed though.

Recent Intel x86 and x86-64 architecture CPUs have a MOVBE instruction (Intel Core since generation 4, after Atom),^[25] which fetches a big-endian format word from memory or writes a word into memory in big-endian format. These processors are otherwise thoroughly little-endian.

There are also devices which use different formats in different places. For instance, the BQ27421 Texas Instruments battery gauge uses the little-endian format for its registers and the big-endian format for its random-access memory. This behavior does not seem to be modifiable.

Floating point[edit]

Although many processors use little-endian storage for all types of data (integer, floating point), there are a number of hardware architectures where floating-point numbers are represented in big-endian form while integers are represented in little-endian form.^[26] There are ARM processors that have mixed-endian floating-point representation for double-precision numbers: each of the two 32-bit words is stored as little-endian, but the most significant word is stored first. VAX floating point stores little-endian 16-bit words in big-endian order. Because there have been many floating-point formats with no network standard representation for them, the XDR standard uses big-endian IEEE 754 as its representation. It may therefore appear strange that the widespread IEEE 754 floating-point standard does not specify endianness.^[27] Theoretically, this means that even standard IEEE floating-point data written by one machine might not be readable by another. However, on modern standard computers (i.e., implementing IEEE 754), one may safely assume that the endianness is the same for floating-point numbers as for integers, making the conversion straightforward regardless of data type. Small embedded systems using special floating-point formats may be another matter, however.

Variable-length data[edit]

Most instructions considered so far contain the size (lengths) of their operands within the operation code. Frequently available operand lengths are 1, 2, 4, 8, or 16 bytes. But there are also architectures where the length of an operand may be held in a separate field of the instruction or with the operand itself, e.g. by means of a word mark. Such an approach allows operand lengths up to 256 bytes or larger. The data types of such operands are character strings or BCD. Machines able to manipulate such data with one instruction (e.g. compare, add) include the IBM 1401, 1410, 1620, System/360, System/370, ESA/390, and z/Architecture, all of them of type big-endian.

Simplified access to part of a field[edit]

On most systems, the address of a multi-byte value is the address of its first byte (the byte with the lowest address); little-endian systems of that type have the property that, for sufficiently low data values, the same value can be read from memory at different lengths without using different addresses (even when alignment restrictions are imposed). For example, a 32-bit memory location with content 4A 00 00 00 can be read at the same address as either 8-bit (value = 4A), 16-bit (004A), 24-bit (00004A), or 32-bit (0000004A), all of which retain the same numeric value. Although this little-endian property is rarely used directly by high-level programmers, it is occasionally employed by code optimizers as well as by assembly language programmers.^{[examples needed]}

In more concrete terms, identities like this are the equivalent of the following C code returning true on most little-endian systems:

union {
  uint8_t u8; uint16_t u16; uint32_t u32; uint64_t u64;
} u = { .u64 = 0x4A };
puts(u.u8 == u.u16 && u.u8 == u.u32 && u.u8 == u.u64 ? "true" : "false");

While not allowed by C++, such type punning code is allowed as «implementation-defined» by the C11 standard^[28] and commonly used^[29] in code interacting with hardware.^[30]

On the other hand, in some situations it may be useful to obtain an approximation of a multi-byte or multi-word value by reading only its most significant portion instead of the complete representation; a big-endian processor may read such an approximation using the same base address that would be used for the full value.

Simplifications of this kind are of course not portable across systems of different endianness.

Calculation order[edit]

Some operations in positional number systems have a natural or preferred order in which the elementary steps are to be executed. This order may affect their performance on small-scale byte-addressable processors and microcontrollers. However, high-performance processors usually fetch multi-byte operands from memory in the same amount of time they would have fetched a single byte, so the complexity of the hardware is not affected by the byte ordering.

Addition, subtraction, and multiplication start at the least significant digit position and propagate the carry to the subsequent more significant position. On most systems, the address of a multi-byte value is the address of its first byte (the byte with the lowest address). The implementation of these operations is marginally simpler using little-endian machines where this first byte contains the least significant digit.

Comparison and division start at the most significant digit and propagate a possible carry to the subsequent less significant digits. For fixed-length numerical values (typically of length 1,2,4,8,16), the implementation of these operations is marginally simpler on big-endian machines.

Some big-endian processors (e.g. the IBM System/360 and its successors) contain hardware instructions for lexicographically comparing varying length character strings.

The normal data transport by an assignment statement is in principle independent of the endianness of the processor.

Middle-endian[edit]

Numerous other orderings, generically called middle-endian or mixed-endian, are possible.

The PDP-11 is in principle a 16-bit little-endian system. The instructions to convert between floating-point and integer values in the optional floating-point processor of the PDP-11/45, PDP-11/70, and in some later processors, stored 32-bit «double precision integer long» values with the 16-bit halves swapped from the expected little-endian order. The UNIX C compiler used the same format for 32-bit long integers. This ordering is known as PDP-endian.^[31]

A way to interpret this endianness is that it stores a 32-bit integer as two little-endian 16-bit words, with a big-endian word ordering:

The 16-bit values here refer to their numerical values, not their actual layout.

Segment descriptors of IA-32 and compatible processors keep a 32-bit base address of the segment stored in little-endian order, but in four nonconsecutive bytes, at relative positions 2, 3, 4 and 7 of the descriptor start.^[32]

Endian dates[edit]

Dates can be represented with different endianness by the ordering of the year, month and day. For example, September 13, 2002 can be represented as:

• little-endian date (day, month, year), 13-09-2002
• middle-endian dates (month, day, year), 09-13-2002
• big-endian date (year, month, day), 2002-09-13 as with ISO 8601

In date and time notation in the United States, dates are middle-endian and differ from date formats worldwide.

Byte addressing[edit]

When memory bytes are printed sequentially from left to right (e.g. in a hex dump), little-endian representation of integers has the significance increasing from left to right. In other words, it appears backwards when visualized, which can be counter-intuitive.

This behavior arises, for example, in FourCC or similar techniques that involve packing characters into an integer, so that it becomes a sequences of specific characters in memory. Let’s define the notation 'John' as simply the result of writing the characters in hexadecimal ASCII and appending 0x to the front, and analogously for shorter sequences (a C multicharacter literal, in Unix/MacOS style):

   '  J  o  h  n  '
hex  4A 6F 68 6E
----------------
   -> 0x4A6F686E

On big-endian machines, the value appears left-to-right, coinciding with the correct string order for reading the result:

But on a little-endian machine, one would see:

Middle-endian machines complicate this even further; for example, on the PDP-11, the 32-bit value is stored as two 16-bit words ‘Jo’ ‘hn’ in big-endian, with the characters in the 16-bit words being stored in little-endian:

Byte swapping[edit]

Byte-swapping consists of rearranging bytes to change endianness. Many compilers provide built-ins that are likely to be compiled into native processor instructions (bswap/movbe), such as __builtin_bswap32. Software interfaces for swapping include:

• Standard network endianness functions (from/to BE, up to 32-bit).^[33] Windows has a 64-bit extension in winsock2.h.
• BSD and Glibc endian.h functions (from/to BE and LE, up to 64-bit).^[34]
• macOS OSByteOrder.h macros (from/to BE and LE, up to 64-bit).

Some CPU instruction sets provide native support for endian byte swapping, such as bswap^[35] (x86 — 486 and later), and rev^[36] (ARMv6 and later).

Some compilers have built-in facilities for byte swapping. For example, the Intel Fortran compiler supports the non-standard CONVERT specifier when opening a file, e.g.: OPEN(unit, CONVERT='BIG_ENDIAN',...). Other compilers have options for generating code that globally enables the conversion for all file IO operations. This permits the reuse of code on a system with the opposite endianness without code modification.

Logic design[edit]

Hardware description languages (HDLs) used to express digital logic often support arbitrary endianness, with arbitrary granularity. For example, in SystemVerilog, a word can be defined as little endian or big endian:

logic [31:0] little_endian; // bit 0 is the least significant bit
logic [0:31] big_endian;    // bit 31 is the least significant bit
logic [0:3][7:0] mixed;     // each byte is little-endian, but bytes are packed in big-endian order.

Files and filesystems[edit]

The recognition of endianness is important when reading a file or filesystem created on a computer with different endianness.

Fortran sequential unformatted files created with one endianness usually cannot be read on a system using the other endianness because Fortran usually implements a record (defined as the data written by a single Fortran statement) as data preceded and succeeded by count fields, which are integers equal to the number of bytes in the data. An attempt to read such a file using Fortran on a system of the other endianness results in a run-time error, because the count fields are incorrect.

Unicode text can optionally start with a byte order mark (BOM) to signal the endianness of the file or stream. Its code point is U+FEFF. In UTF-32 for example, a big-endian file should start with 00 00 FE FF; a little-endian should start with FF FE 00 00.

Application binary data formats, such as MATLAB .mat files, or the .bil data format, used in topography, are usually endianness-independent. This is achieved by storing the data always in one fixed endianness or carrying with the data a switch to indicate the endianness. An example of the former is the binary XLS file format that is portable between Windows and Mac systems and always little-endian, requiring the Mac application to swap the bytes on load and save when running on a big-endian Motorola 68K or PowerPC processor.^[37]

TIFF image files are an example of the second strategy, whose header instructs the application about the endianness of their internal binary integers. If a file starts with the signature MM it means that integers are represented as big-endian, while II means little-endian. Those signatures need a single 16-bit word each, and they are palindromes, so they are endianness independent. I stands for Intel and M stands for Motorola. Intel CPUs are little-endian, while Motorola 680×0 CPUs are big-endian. This explicit signature allows a TIFF reader program to swap bytes if necessary when a given file was generated by a TIFF writer program running on a computer with a different endianness.

As a consequence of its original implementation on the Intel 8080 platform, the operating system-independent File Allocation Table (FAT) file system is defined with little-endian byte ordering, even on platforms using another endianness natively, necessitating byte-swap operations for maintaining the FAT on these platforms.

ZFS, which combines a filesystem and a logical volume manager, is known to provide adaptive endianness and to work with both big-endian and little-endian systems.^[38]

Networking[edit]

Many IETF RFCs use the term network order, meaning the order of transmission for bits and bytes over the wire in network protocols. Among others, the historic RFC 1700 (also known as Internet standard STD 2) has defined the network order for protocols in the Internet protocol suite to be big-endian, hence the use of the term network byte order for big-endian byte order.^[39]

However, not all protocols use big-endian byte order as the network order. The Server Message Block (SMB) protocol uses little-endian byte order. In CANopen, multi-byte parameters are always sent least significant byte first (little-endian). The same is true for Ethernet Powerlink.^[40]

The Berkeley sockets API defines a set of functions to convert 16-bit and 32-bit integers to and from network byte order: the htons (host-to-network-short) and htonl (host-to-network-long) functions convert 16-bit and 32-bit values respectively from machine (host) to network order; the ntohs and ntohl functions convert from network to host order.^[41][42] These functions may be a no-op on a big-endian system.

While the high-level network protocols usually consider the byte (mostly meant as octet) as their atomic unit, the lowest network protocols may deal with ordering of bits within a byte.

Bit endianness[edit]

Bit numbering is a concept similar to endianness, but on a level of bits, not bytes. Bit endianness^{[citation needed]} or bit-level endianness refers to the transmission order of bits over a serial medium. The bit-level analogue of little-endian (least significant bit goes first) is used in RS-232, HDLC, Ethernet, and USB. Some protocols use the opposite ordering (e.g. Teletext, I²C, SMBus, PMBus, and SONET and SDH^[43]), and ARINC 429 uses one ordering for its label field and the other ordering for the remainder of the frame. Usually, there exists a consistent view to the bits irrespective of their order in the byte, such that the latter becomes relevant only on a very low level. One exception is caused by the feature of some cyclic redundancy checks to detect all burst errors up to a known length, which would be spoiled if the bit order is different from the byte order on serial transmission.

Apart from serialization, the terms bit endianness and bit-level endianness are seldom used, as computer architectures where each individual bit has a unique address are rare. Individual bits or bit fields are accessed via their numerical value or, in high-level programming languages, assigned names, the effects of which, however, may be machine dependent or lack software portability.

Notes[edit]

References[edit]

Тема: Представление
чисел в компьютере. Формат с фиксированной и плавающей запятой. Прямой,
обратный и дополнительный код.

Повторение:
Перевод целых чисел в двоичную систему счисления:

13₁₀
= а₂                                                           
                                   Аналогично:

Представление целых чисел в
компьютере.

Вся информация, обрабатываемая компьютерами, хранится в них в двоичном
виде. Каким же образом осуществляется это хранение?

Информация, вводимая в компьютер и возникающая в ходе его работы,
хранится в его памяти. Память компьютера можно представить как длинную
страницу, состоящую из отдельных строк. Каждая такая строка называется ячейкой
памяти.

Ячейка – это часть памяти компьютера,
вмещающая в себя информацию, доступную для обработки отдельной командой
процессора. Минимальной адресуемой ячейкой памяти называется байт – 8 двоичных
разрядов. Порядковый номер байта называется его адресом.

                                                                                                                     
ячейка (8бит = 1байт)

Содержимое ячейки памяти называется машинным словом.

Ячейка памяти состоит из некоторого числа однородных элементов. Каждый
элемент способен находиться в одном из двух состояний и служит для изображения
одного из разрядов числа. Именно поэтому каждый элемент ячейки называют разрядом.                          Нумерацию
разрядов в ячейке принято вести справа налево, самый правый разряд имеет порядковый
номер 0. Это младший разряд ячейки памяти, старший разряд имеет порядковый
номер (n-1) в n-разрядной ячейке памяти.

Содержимым любого разряда может быть либо 0, либо 1.

Содержимое ячейки памяти называется машинным словом. Ячейка
памяти разделяется на разряды, в каждом из которых хранится разряд числа.

Например, самые современные персональные компьютеры являются
64-разрядным, то есть машинное слово и соответственно, ячейка памяти, состоит
из 64 разрядов или битов.

Бит — минимальная единица измерения
информации. Каждый бит может принимать значение 0 или 1. Битом
также называют разряд ячейки памяти ЭВМ.

Стандартный размер наименьшей ячейки памяти равен восьми битам, то есть
восьми двоичным разрядам. Совокупность из 8 битов является основной единицей
представления данных – байт.

Байт (от английского byte – слог) – часть
машинного слова, состоящая из 8 бит, обрабатываемая в ЭВМ как одно целое. На
экране – ячейка памяти, состоящая из 8 разрядов – это байт. Младший разряд
имеет порядковый номер 0, старший разряд – порядковый номер 7.

8
бит = 1 байт

Для представления чисел в памяти компьютера
используются два формата: формат с фиксированной точкой и формат с
плавающей точкой. В формате с фиксированной точкой
представляются только целые числа, в
формате с плавающей точкой – вещественные числа
(дробные).

В подавляющем большинстве задач, решаемых с помощью ЭВМ, многие
действия сводятся к операциям над целыми числами. Сюда относятся задачи
экономического характера, при решении которых данными служат количества акций,
сотрудников, деталей, транспортных средств и т.д. Целые числа используются для
обозначения даты и времени, и для нумерации различных объектов: элементов
массивов, записей в базах данных, машинных адресов и т.д.

Целые числа могут представляться в
компьютере со знаком или без знака (быть положительными или отрицательными).

Целые числа без знака обычно занимают в памяти один или два байта и принимают в
однобайтовом формате значения от 00000000₂ до 11111111₂ ,
а в двухбайтовом формате — от 00000000 00000000₂ до 11111111
11111111₂.

Целые числа со знаком обычно занимают в памяти компьютера один, два или четыре байта,
при этом самый левый (старший) разряд содержит информацию о знаке числа. Знак
«плюс» кодируется нулем, а «минус» — единицей.

Так числа   13₁₀=1101₂ 
и      1345₁₀=10101000001₂  представляются в
памяти компьютера следующим образом:

1101₂                                                                                                                     10101000001₂

Разряд,
отводимый под знак

     (в этом случае +)

Недостающие до целого байта старшие
разряды заполняются нулями.

В компьютерной технике применяются три
формы записи (кодирования) целых чисел со знаком: прямой код, обратный
код, дополнительный код.

Прямой код – это представление числа в двоичной системе счисления, при этом
первый разряд отводится под знак числа. Если число положительное, то в первом
разряде находится 0, если число отрицательное, в первом разряде указывается
единица.

На самом деле прямой код
используется почти исключительно для положительных чисел. Для записи прямого кода числа необходимо:

1)     
Представить число в двоичной
системе

2)     
Дополнить запись числа нулями
до предпоследнего старшего разряда 8-ми разрядной или 16-ти разрядной ячейки

3)     
Заполнить старший разряд нулем
или единицей в зависимости от знака числа.

Пример:  число 3₁₀
в прямом коде однобайтного формата будет представлено в виде:

                число -3₁₀
в прямом коде однобайтного формата имеет вид:  

Обратный код для положительного числа в двоичной системе счисления совпадает с
прямым кодом. Для отрицательного числа все цифры числа заменяются на
противоположные (1 на 0, 0 на 1) инвертировать, а в знаковый разряд заносится единица.

Для отрицательных чисел
используется так называемый дополнительный код. Это связано с удобством
выполнения операций над числами вычислительной техникой.

Дополнительный код используют в основном для представления в
компьютере отрицательных чисел. Такой код делает арифметические операции более
удобными для выполнения их вычислительной техникой.

В дополнительном коде,
также как и прямом, первый разряд отводится для представления знака числа.
Прямой и дополнительный код для положительных чисел совпадает. Поскольку прямой
код используется почти исключительно для представления положительных чисел, а
дополнительный – для отрицательных, то почти всегда, если в первом разряде 1,
то мы имеем дело с дополнительным кодом. (Ноль обозначает положительное число,
а единица – отрицательное).

Алгоритм получения дополнительного кода для
отрицательного числа:

1. Найти прямой код числа (перевести
число в двоичную систему счисления число без знака)

2. Получить обратный код.
Поменять каждый ноль на единицу, а единицу на ноль (инвертировать число)

3. К обратному коду
прибавить 1

Пример: Найдем дополнительный код десятичного числа – 47 в
16-ти разрядном формате.

1.     
Найдем двоичную запись числа 47
(прямой код).

2. Инвертируем это число (обратный
код).

3. Прибавим 1 к обратному
коду и получим запись этого числа в оперативной памяти.

Важно!

Для положительных чисел
прямой, обратный и дополнительный коды – это одно и тоже, т.е. прямой код.
Положительные числа для представления в компьютере инвертировать не надо!

Почему же используется дополнительный код для представления
отрицательного числа?

Так проще выполнять
математические операции. Например, у нас два числа, представленных в прямом
коде. Одно число положительное, другое – отрицательное и эти числа нужно
сложить. Однако просто сложить их нельзя. Сначала компьютер должен определить,
что это за числа. Выяснив, что одно число отрицательное, ему следует заменить
операцию сложения операцией вычитания. Потом, машина должна определить, какое
число больше по модулю, чтобы выяснить знак результата и определиться с тем, что
из чего вычитать. В итоге, получается сложный алгоритм. Куда проще складывать
числа, если отрицательные преобразованы в дополнительный код.

 Практическая
задание:

Задание 1. Записать
прямой, обратный и дополнительный коды следующих десятичных чисел, используя 8
-разрядную ячейку:

64_10, —
120₁₀

Задание 2. Записать
прямой, обратный и дополнительный коды следующие десятичные числа в 16-ти
разрядной сетке

57₁₀    — 117₁₀    — 200₁₀